Programming languages
Languages | Experience | Rating | Last used |
---|---|---|---|
C | 20 years | 5 | 2024 |
C++ | 15 years | 5 | 2024 |
Assembler | 5 years | 4 | 2023 |
Python | 2 years | 3 | 2024 |
VHDL | 1 years | 3 | 2010 |
Experienced embedded software engineer. Enthusiast of hardware-software interfacing and modern C++ applications in embedded systems (where applicable). Enjoys prototyping and exploring new solutions to occuring problems.
Experienced in creating projects from scratch as well as in joining large projects which have been in development for a long time. When joining a new project he adopts an en masse attitute to understand the project structure, program flow and data flow as a whole.
Languages | Experience | Rating | Last used |
---|---|---|---|
C | 20 years | 5 | 2024 |
C++ | 15 years | 5 | 2024 |
Assembler | 5 years | 4 | 2023 |
Python | 2 years | 3 | 2024 |
VHDL | 1 years | 3 | 2010 |
Tool | Experience | Rating | Last used |
---|---|---|---|
Bluetooth | 3 years | 4 | 2024 |
GitLab | 4 years | 4 | 2024 |
CAN-kommunikation | 4 years | 4 | 2023 |
Embedded Linux | 3 years | 3 | 2011 |
STM32CubeIDE | 5 years | 5 | 2023 |
GCC | 10 years | 5 | 2024 |
Git | 10 years | 4 | 2024 |
KiCAD | 2 years | 3 | 2019 |
Mercurial | 1 years | 3 | 2018 |
Raspberry Pi | 2 years | 4 | 2022 |
QT | 2 years | 4 | 2019 |
Segger J-Link | 2 years | 4 | 2024 |
ST-Link | 5 years | 5 | 2024 |
Vim | 15 years | 4 | 2024 |
Wireshark | 3 years | 3 | 2017 |
Tool | Experience | Rating | Last used |
---|---|---|---|
Bluetooth Low Energy (BLE) | 3 years | 4 | 2024 |
CAN | 4 years | 4 | 2023 |
Device Drivers | 10 years | 5 | 2024 |
Electronics | 15 years | 4 | 2023 |
FPGA | 1 years | 3 | 2010 |
Git | 10 years | 4 | 2024 |
High Speed PCB Design | 1 years | 3 | 2010 |
JSON | 2 years | 3 | 2018 |
Linux | 15 years | 5 | 2024 |
PCB Design | 5 years | 3 | 2019 |
Prototyping | 10 years | 5 | 2023 |
RTOS | 7 years | 5 | 2024 |
Language | Skill level |
---|---|
Polish | Native speaker |
English | Highly proficient |
Development of embedded firmware for Swing Door operator running FreeRTOS / SafeRTOS on STM32 family MCU in C and C++ (occasionally modern C++). Leading process of new MCU introduction into a complex code base with multiple dependencies holding principle of having compilable and testable code at any stage. Creating hardware drivers for newly introduced MCU (UART, SPI, PWM, ADC/DMA, rotary encoder). Making project decisions regarding code structure. Modifying the code structure for better portability, extensibility and performance. BLE development on nRF52 for Central Device (BLE central, nRF52, C, C++20, lock-free task safety). Identifying and fixing elusive bugs randomly reproduced (eg. related to task-safety violations and race conditions). Working closely to electronics team. Taking part in electronics design reviews, preparing test firmware for electronic hardware evaluation (both internal and external). Working closely with mobile application team regarding BLE communication with mobile application. Creating python code for fixes verification (randomly reproduced bugs, developer tests).
Harvester Head and Crane Driver development. C++14 code development for Cortex-M4 MCU (STM32F407) running FreeRTOS. Enabling modern C++ into embedded systems with no MMU running RTOS (std::thread-like FreeRTOS task implementation, std::chrono-based time management, state machines, layered software design with strict decomposition to hardware dependent and independent layers, employing variadic templates when needed, object-oriented HAL design servicing CAN, GPIO, UART, hardware interrupts). Interrupt-task and inter-task data flow implementation, software design and implementation joining proper data encapsulation with various contexts of program flow (task, interrupt). Implementation of binary actuators and proportional valves drivers, rotary encoders data capture. Implementation of task-safe logger providing stream interface (used like std::cout) for FreeRTOS. Logger provides separate queues for logging tasks, UART or System Log (based on NOR-flash) access is synchronized on ::endl stream manipulator thus ensuring logging order between tasks. Hardware design (schematic diagram and PCB) of the harvester head/crane driver board interfacing industrial actuators, rotary encoders and sensors with the MCU (Schmitt triggers, MOSFETs, LDOs, signal/power decoupling, industrial noise- and surge-resistant design), proportional valves hardware driver design.
Set-top box software development (C, Linux). asynchronous/multithreaded plugin development for external customer framework integration (state machine, HTTP/JSON, threads synchronization, inter-thread notifications). MPEG2/PMT CRC test suite development
High-frequency (HF) RF transmitter-receiver system design. wide-band (LW/MW/SW) low-noise high-sensitivity world receiver prototype design. analogue design for radio frequency (based on BJT/FET transistors, operational amplifiers, RF ICs). impedance matching, shielding, RF currents flow, RF power transfer, EMI reduction, high sensitivity and low noise RF design. Ngspice design simulation supporting practical hardware implementation.
Design and implementation of new version of DBUS security policies library (C++11, STL/boost, XML)
multithreaded framework development (in C) for wireless/LTE dynamic environment management. Framework runs in virtualized RT-patched Linux running on modern multicore Intel Haswell architecture. design and implementation of custom high speed/low latency wait-free full-duplex communication channel used by Host and Guest applications to communicate via Shared Memory in virtualized Linux. modular/layered code design for high quality source code full-cycle code development (design, implementation, developer testing) working with SCRUM software development methodology. user space driver development (in C) for CPRI IP-core running on Virtex FPGA.
C++ payment application development for ARM-based Payment Devices running Verix Evo operating system. High-level multithreaded network programming (Ethernet, WiFi, Bluetooth). Implementation of remote firmware upgrade module. Making payment application compatible with company corporate policy regarding multiprocessing and hardware management (design and implementation of optimal software architecture for best speed and least development effort).
Design of portable Digital Storage Oscilloscope. FPGA firmware development (VHDL). high-speed digital and analogue hardware design (impedance-controlled PCB routing, clearance from noisy circuits, proper FPGA power supply decoupling minimizing jitter and digital noise). FPGA-USB interfacing. FPGA-ADC interfacing. OP-AMPs based high speed analogue frontend design. development of portable multithreaded DSO control application (C++, STL, wxWidgets). preparing advertising campaign. retail sales of the device.
Embedded software development for ARM7 microcontrollers (in C). Linux kernel (2.6.x) development for car navigation systems with ARM9 processors (hardware drivers development). PC host applications development and interfacing with hardware (C++, Ethernet, USB, RS232). created CAN Analyzer (sniffer) for automatic vehicle CAN data acquisition and sequence recognition capable to extract information such as door state, engine speed, fuel level, etc. (hardware part: C, C166/ARM7; PC control application: C++, STL, UDP, multithreaded queue-based hardware-PC host communication). ARM7 based hardware design and low level software development.
Consultant/Software Developer C, C++ development for STM32 and nRF52. Code structure design.
Senior Embedded Software Engineer
Senior Software Engineer
RF and analog design self-education
Senior Software Engineer
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